Generally, as semiconductor memory devices become more highly integrated, a cell size inside the semiconductor memory is gradually reduced, and a driving voltage is lowered due to the reduced cell size.
Meanwhile, such a semiconductor memory includes an internal voltage generator to receive a power supply voltage VDD and generate an internal voltage required in the semiconductor memory.
FIG. 1 is a circuit diagram showing an internal voltage generator according to the related art. Particularly, the internal voltage generator generates an internal voltage VPP used in word lines of a memory cell by raising the power supply voltage VDD.
As shown in FIG. 1, the internal voltage (VPP) generator according to the related art includes an internal voltage detecting unit 100, which detects the level of the internal voltage VPP to output an internal voltage pumping signal Vpump_on, a reference voltage generating unit 200, which generates a reference voltage Vref for the internal voltage VPP, and an internal voltage generating unit 300, which pumps the internal voltage VPP according to the internal voltage pumping signal Vpump_on. The internal voltage detector 100 includes a differential amplifier to operate by comparing a voltage Vsens, which is generated by detecting the level of the internal voltage VPP, and the reference voltage Vref.
In the differential amplifier of the internal voltage detector 100, if a semiconductor memory is in an active operation mode, a first current sink unit NM1 is turned on in response to an active signal ACT to form a current path. In addition, if the semiconductor memory is in a stand-by operation mode, a second current sink unit NM2 is turned on in response to the reference voltage Vref to form a current path. Generally, the second current sink unit NM2 includes a transistor having a channel longer than that of a transistor of the first current sink unit NM1 in order to reduce current consumption.
Hereinafter, the operation of the internal voltage generator having the above structure according to the related art will be described.
As shown in FIG. 1, the internal voltage detector 100 detects the level of the internal voltage VPP, and compares the detected voltage Vsens with the reference voltage Vref.
In this case, if the detected voltage Vsense is smaller than the reference voltage Vref, a transistor NM4 is open more than a transistor NM3, so that a signal of a node A becomes a low level, and the internal voltage pumping signal Vpump_on becomes a high level. Thus, the internal voltage generating unit 300 generates the internal voltage VPP in response to the internal voltage pumping signal Vpump_on having a high level.
In contrast, if the detected voltage Vsense is greater than the reference voltage Vref, the transistor NM3 is opened more than the transistor NM4, so that a signal of a node B becomes a low level, and the signal of the node A becomes a high level. Accordingly, the internal voltage pumping signal Vpump_on becomes a low level, so that the internal voltage generating unit 300 is stopped.
Meanwhile, if such an internal voltage generator according to the related art is in an active operation mode under a cold temperature, the first current sink unit NM1 is turned on so that the differential amplifier smoothly operates. However, if the internal voltage generator is in a stand-by operation mode, the threshold voltage of the second sync unit NM2 rises so that the differential amplifier does not operate smoothly. Accordingly, the internal voltage detecting unit 100 erroneously operates to be failed.
Even if the level of the internal voltage VPP becomes a high level, such an erroneous operation of the internal voltage detecting unit 100 continuously operates the internal voltage generating unit 300 without stopping the internal voltage generating unit 300, so that excessive current consumption occurs.